Timing Closure Solution
Introduction :
 
To meet complex SoC design implementation requirements, Socle introduces the Timing Closure Solution to overcome those frequently-encountered challenges see below, for efficient and precise timing convergence execution.
  How to consider the process migration and timing convergence challenge on UDSM design?
  How to tightly integrate the complex implementation solution with timing, area, power, DFT, reliability, DFM consideration?
  How to reduce the implementation cycle and quickly time convergence with DRC clean?
  How to optimize clock skew, latency, transition, duty cycle and meet timing specification?

With Timing Closure Solution derived from SoC-ImP ® technology, the more secure and comprehensive integrated implementation platform solution shall be introduced by Socle for a successful SoC customer .

 
Features :
 
Integrated solution with synthesis, floorplan, physical synthesis, CTS, routing, RC extraction in SoC-ImP ® Platform, The SoC implementation platform is one pre-verified and parameterized environment.
Use aggressive constraints, flow and boundary optimization techniques for area reduction.
Architecture driven Floorplan which is key factor to speed up the timing convergence.
RC correlation between synthesis, placement, global routing and final RC extraction engine.
Physical synthesis to speed up the timing convergence.
Gated clock tree topology analysis and planning.
Clock Tree synthesis in prototype phase which is 95% accuracy compare to final CTS
   
Benefits :
 
Predicable implementation schedule. Experience the schedule reduction from 4 weeks to 3 weeks* (*: For 1 million gate count design)
Production proven aggressive constraint setup and optimization technique ensure better area reduction.
Optimize the clock tree skew, latency, transition, and duty cycle for easier timing fulfillment
   
Support :
 
STA (Static Timing Analysis) training
Coding for STA training
Timing constraint consultant support