To meet complex SoC design implementation requirements,
Socle introduces the Reliability Solution to overcome those
frequently-encountered challenges see below, to meet customer
SoC quality policy demands.
How to avoid a signal integrity issue in SoC
chip implementation?
How to analyze/Fix EM and IR issue base on accurate power
consumption?
How to improve SoC chip reliability in the implementation
flow?
How to reduce power noise?
With a Reliability Solution derived from SoC-ImP
® technology, the more secured and comprehensive
integrated implementation platform solution shall be introduced
by Socle for a successful SoC customer.
Features
:
Signal integrity (cross talk) prevention, analysis and correction solution.
Integrated SI and timing closure solution.
Power reliability (IR drop and Electron-Migration) prevention in prototype phase.
Integrated power analysis result into power reliability analysis.
DCAP insertion.
Benefits
:
Reduce power noise in design to avoid a chip
reliability issue.
Reduce signal noise in the design to avoid the function and
timing issue
Completely signal integrity and power reliability analysis.
