The LDK (Leopard Development Kit) is an ASIC version of the SOC
development kit designed for the user to develop application and
hardware/software easily. The LDK Development Board is an integrated
system-on-chip development board with a built-in ARM926EJ processor
core and Leopard Pro Core. It can be integrated with Customer's
development boards through AHB extension, with up to 7 external
bus masters and 8 external bus slaves. LDK can efficiently lower
overall system cost, reduce development cycle time, and accelerate
product introduction.
The board also provides I2C, SD, UART, RTC, SDR/DDR, 10/100 Ethernet, USB2.0 Device controller, PCI Host/Simple bridge, and MPGE4 encoder/decoder etc. circuit or peripherals as a reference design.
The LDK has a boot code in Flash for system initialization. User can
then develop an application code via ICE and/or tool chain as well
as various operating systems, BSP, drivers and reference applications.
Features
:
ARM926EJ CPU
High-performance ARM926EJ CPU runs up to 200 MHz
Jazelle-enhanced
DSP extensions
Build-in 16KB I-cache, 16KB D-cache
DDR SDRAM Memory Controller
Support for up to 512MB IT used standard memory 184-pin DDR
DIMM
SDR SDRAM Memory Controller(LDK3.1)
Support one on-board 16MB (x32) SDRAM chip
System Memory
Direct connection to 8-bit Flash ROM devices (Intel 28F640J3
64Mb)
PCI HOST
Compatible with PCI Specification, Revision
2.2 (3.3V compliant I/Os)
32-bit operating up to 33 MHz
10/100 Fast Ethernet MAC Controllers
Two 10/100 Ethernet Controllers providing both MAC and chaining
DMA Controller.
MII port connect to external PHY device (RTL8201)
USB 2.0 Device Controllers
Fully compliant with the USB specification version 2.0
Supports full and high speed data rates (up to 480Mbps),
suspend/resume mode, and control/bulk/interrupt transfer.
UTMI port connect to external USB PHY device
I2C Master/Slave Interface
Compatible with I2C specification v2.1.
Support Master ( multi-master) or Slave device mode of I2C
bus.
Support 7-bit or 10-bit address mode operation.
SD HOST Controller
Compliant with SD spec. Version 1.01.
Forward compatible with Multimedia Card (MMC).
UART
Two UART with Separate transmit and receive FIFO buffers
(16 x 8) to reduce CPU interrupts.
SPI
Support full duplex, synchronous and serial data link for
customer serial interface device control.
GPIO
16 individually programmable input/output pins.
AHB Expansion Bus
High Performance 32-bit AMBA AHB system bus running at ratio
of 1:1 or 1:2 compare with the CPU clock period.
Support 6 external bus masters, 8 external bus slaves and
13 interrupts
Optional AHB extension FPGA EVB available.
1. MPEG4 Video Codec(LDK3.1)
Supports Simple Profile Levels L0 to L3 and thus baseline
H.263
Scalable resolution of QCIF, CIF, VGA and D1 @ 30 fps
Support 8-bit CCIR-656 4:2:2 raster video interface
Support S/W controllable VBR, CBR and user defined Quantization
Table
2. Software development kit
OS / Drivers /BSP
- Monta Vista Linux RTOS v2.4.20
Tool Chain
- Monta Vista Professional Edition 3.1
Benefits :
LDK provides a fast and cost effective solution
for platform based system prototyping
With complete hardware and software solutions
- Hardware Package: LDK Development Board, AHB FPGA Extension Board
- Software Package: Diagnostic Program, Boot Loader, Linux BSP/Driver
Workshop / FAE support
Supporting :
Hardware and Software Workshop Training
LDK Related Documents
E-Update: Update software image through Socle Website