| IDE Host Controller
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Fully compliant with ATA/ATAPI-6 protocol (max.
ATA-133 hard-drive support) which can access hard disk, CD-ROM,
microdrive*, CF cards*, and PCMCIA cards*, etc.(*:only for true
IDE mode and 16 bit devices) |
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Compliant with ARM AMBA AHB interface. |
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Registers compatible with the Intel standard register setting.
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Configurable FIFO for IDE channel. |
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Driver support RAID 0 (striping), RAID 1 (mirroring) and
RAID 0+1 (mirrored-striped) function. |
| USB Device Controller |
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Complies with the USB Rev. 2.0, Supports USB Full Speed
(12Mb/sec) and High Speed (480 Mb/sec), is backward-compatible
with USB1.1 |
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Support AHB M/S I/F operation |
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Double buffering scheme for main endpoint increases throughput
and eases real-time data transfer Dual-Port SRAM : 576 x 32-bit
space providing 2 data sets for each BULK-IN and BULK-OUT Endpoints |
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Support Control, BULK, Interrupt transfer type |
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Automatic retry of failed packets, and PING Flow control
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Separate data buffers for the SETUP portion of a CONTROL
transfer |
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Support DMA Engine–Used to move the large block data between
local memory and USB without intervene of CPU |
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Complete USB printing device class specification version
1.1 compatibility |
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On-chip USB transceiver and Serial Bus Interface Engine (SIE)
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Suspend / Resume operation - Supports USB remote wake-up
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Automatic transmit/receive memory or buffer management |
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One AHB bus master interface with a DMA engine for all transfers.
The interface supports AHB RETRY and SPLIT operations |
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One AHB bus slave interface for access of configuration registers
and transmit / receive memories |
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The DMA engine supports
- Increment addressing mode
- 32-bit wide transactions
- 5 DMA channels and fixed channel priority arbitration for
all endpoints |
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16-word burst transfer in DMA operation |
| USB Host Controller |
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USB 2.0 High Speed Host Controller. |
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Intel™ EHCI host controller. The USB host controller registers
and data structures are compliant to Intel ™ EHCI specification.
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AHB compliant system bus interface. |
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Direct support for USB Transceiver Macrocell Interface (UTMI
/ UTMI+) or Philips interface transceivers. |
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Configurable dual port RAM buffers isolate memory latency
on the system bus from the timing requirements of the USB. |
| SD/MMC Host Controller |
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Compliant with the AMBA APB interface |
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Compliant with SD spec. Version 1.01 and compatibility to
Multi Media Card (MMC) |
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Variable clock rate 0 – 25 MHz which depends on APB clock
rate |
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Support MMU structure with DMA function to enhance the SD/MMC
access performance |
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Support 2 ports |
